Wafer Processing
In
semiconductor device fabrication, the various processing steps fall into four
general categories: deposition, removal, patterning,
and modification of electrical properties.
• Deposition
is any process that grows, coats, or otherwise transfers a material onto the
wafer. Available technologies consist of physical vapor deposition (PVD),
chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular
beam epitaxy
(MBE) and more recently, atomic layer deposition (ALD) among others.
• Removal
processes are any that remove material from the wafer either in bulk or
selectively and consist primarily of etch processes, either wet etching or dry
etching. Chemical-mechanical planarization (CMP) is also a removal process used
between levels.
• Patterning
covers the series of processes that shape or alter the existing shape of the
deposited materials and is generally referred to as lithography. For example,
in conventional lithography, the wafer is coated with a chemical called a
“photoresist”. The photoresist is exposed by a “stepper”, a machine that
focuses, aligns, and moves the mask, exposing select portions of the wafer to
short wavelength light. The unexposed regions are washed away by a developer
solution. After etching or other processing, the remaining photoresist is
removed by plasma ashing.
• Modification
of electrical properties has historically consisted of
doping transistor sources and drains originally by diffusion furnaces and later
by ion implantation. These doping processes are followed by furnace anneal or
in advanced devices, by rapid thermal anneal (RTA) which serve to activate the
implanted dopants. Modification of electrical properties now also extends to
reduction of dielectric constant in low-k insulating materials via exposure to
ultraviolet light in UV processing (UVP).
Many modern chips have eight or
more levels produced in over 300 sequenced processing steps.
Typical Wafer Preparation for Processing
